Why Your Computer Performance has Dropped: When Windows XP computers were first shipped, many retailers only installed the minimum amount of memory required to run a Windows XP computer - 128 MB. Consumers took their new computers home only to find that after they loaded all of their games and applications their computer's performance dropped drastically and was even slower than their old computer.
Shortly thereafter, the default amount of in new computers was increased to a more robust 256 MB. This was plenty of memory for computer performance with Windows XP and a few applications running. However consumers have become increasing concerned about their security and have installed ever more demanding anti-virus, anti-spyware, and firewall programs. With all of this running at once computer performance has taken a hit again and many people now rely on Windows virtual memory to run their computer.
What You Can do to Increase Computer Performance: The best way to increase computer performance in this scenario is to upgrade your memory to 512 MB or more. Memory prices are lower than ever, and installing memory is not difficult to do. But if your budget is tight or you don't have the time to do a memory upgrade, there is a quick procedure you can perform to increase your computer performance.
Windows XP comes out of the box all dressed up for Sunday dinner. Menus fade in and out, items slide smoothly while subtle shadows and smooth edges make Windows XP look more sleek than its Windows 2000 predecessor. Pretty is nice, but in the realm of computer performance, looks can kill. All of that extra work saps processor time which increases the demand on your computer's memory. If you are already low on memory, that will increase your need for virtual memory and that will weigh on your computer's performance.
Some people like Windows XP's looks and some people couldn't care less if it looked like Windows 2000 or not. What most people do not know is that there is a screen in Windows that allows you to tell Windows XP what looks to turn on and which to turn off. The more you disable, the more your computer performance will increase. The steps below will show you how to custom tailor Windows XP to your preference - looks or speed.
How to Increase Computer Performance:
1. Left click on your Start Menu
2. Right click on My Computer
3. Left click on "Properties" in the drop down menu
4. Left click on the "Advanced" tab
5. Under Performance left click on the "Settings" button
6. To maximize computer performance, left click on "Adjust for best performance"
7. If you would rather choose what is on or off, uncheck the items you wish to disable
8. When you are done, left click on "Apply"
9. Left click on "Ok"
You can return to this window any time you wish to adjust your computer performance settings by following the same steps. In some cases, setting your Windows XP to "Adjust for best performance" can boost your computer performance by as much as 25%!
Tuesday, November 10, 2009
Thursday, November 5, 2009
What is the Application Layer?
The Application Layer is layer seven of the OSI model.
The Application Layer resides above the Presentation Layer.
The Application Layer of the OSI model is responsible for providing end-user services, such as file transfers, electronic messaging, e-mail, and virtual terminal access.
The application layer is the layer with which the user interacts.
Application Layer Standards
Standards which operate at the Application Layer include: FTP, telnet, and SSH.
The Application Layer resides above the Presentation Layer.
The Application Layer of the OSI model is responsible for providing end-user services, such as file transfers, electronic messaging, e-mail, and virtual terminal access.
The application layer is the layer with which the user interacts.
Application Layer Standards
Standards which operate at the Application Layer include: FTP, telnet, and SSH.
What is the Presentation Layer?
The Presentation Layer is layer six of the OSI model.
The Presentation Layer resides above the Session Layer and below the Application Layer.
The Presentation Layer is responsible for defining the syntax which two network hosts use to communicate.
Encryption and compression should be Presentation Layer functions, although they are frequently provided on other layers.
The Presentation Layer resides above the Session Layer and below the Application Layer.
The Presentation Layer is responsible for defining the syntax which two network hosts use to communicate.
Encryption and compression should be Presentation Layer functions, although they are frequently provided on other layers.
What is the Session Layer?
The Session Layer is layer five of the OSI model.
The Session Layer resides above the Transport Layer and below the Presentation Layer.
The Session Layer is responsible for establishing process-to-process commnunications between networked hosts.
Session Layer Standards
Standards which operate at the Session Layer include: RPC, Named Pipes, and NetBIOS.
The Session Layer resides above the Transport Layer and below the Presentation Layer.
The Session Layer is responsible for establishing process-to-process commnunications between networked hosts.
Session Layer Standards
Standards which operate at the Session Layer include: RPC, Named Pipes, and NetBIOS.
What is the Transport Layer?
The Transport Layer is layer four of the OSI model.
The Transport Layer resides above the Network Layer and below the Session Layer.
The Transport Layer is responsible for delivering messages between networked hosts.
As part of this, the Transport Layer is also responsible for fragmentation and reassembly.
In addition, some Transport Layer protocols also provide services to manage flow control and end-to-end error recovery.
Transport Layer Standards
Standards which operate at the Transport Layer include: TCP and UDP.
The Transport Layer resides above the Network Layer and below the Session Layer.
The Transport Layer is responsible for delivering messages between networked hosts.
As part of this, the Transport Layer is also responsible for fragmentation and reassembly.
In addition, some Transport Layer protocols also provide services to manage flow control and end-to-end error recovery.
Transport Layer Standards
Standards which operate at the Transport Layer include: TCP and UDP.
What is the Network Layer?
The Network Layer is layer three of the OSI model.
The Network Layer resides above the Data Link Layer and below the Transport Layer.
The Network Layer is responsible for establishing paths for data transfer through the network.
The Network Layer extends the Data Link Layer beyond the local network into an internetwork by providing for routing and forwarding of packets.
The Network Layer is also responsible for packet sequencing, congestion control, and error handling.
Routers operate at the Network Layer.
Network Layer Standards
Standards which operate at the Network Layer include: IP and ICMP.
The Network Layer resides above the Data Link Layer and below the Transport Layer.
The Network Layer is responsible for establishing paths for data transfer through the network.
The Network Layer extends the Data Link Layer beyond the local network into an internetwork by providing for routing and forwarding of packets.
The Network Layer is also responsible for packet sequencing, congestion control, and error handling.
Routers operate at the Network Layer.
Network Layer Standards
Standards which operate at the Network Layer include: IP and ICMP.
The Data Link Layer is layer two of the OSI model.
The Data Link Layer resides above the Physical Layer and below the Network Layer.
The Data Link Layer is responsible for communications between adjacent network nodes. Hubs and switches operate at the Data Link Layer.
The Data Link Layer is logically divided into two sub-layers, The Media Access Control (MAC) Sub-layer and the Logical Link Control (LLC) Sub-layer.
Media Access Control Sub-layer
The MAC Sub-layer is responsible for addressing on the Local Area Network.
The MAC Sub-layer is also responsible for determining when nodes on a Local Area Network are allowed to transmit. In Ethernet, this is accomplished using the CSMA/CD protocol.
Logical Link Sub-layer
The LLC Sub-layer is responsible for synchronizing frames, error checking, and flow control.
Data Link Layer Standards
Standards which operate at the Data Link Layer include: Ethernet, Wi-Fi, Frame Relay, ATM, and PPP.
The Data Link Layer is responsible for communications between adjacent network nodes. Hubs and switches operate at the Data Link Layer.
The Data Link Layer is logically divided into two sub-layers, The Media Access Control (MAC) Sub-layer and the Logical Link Control (LLC) Sub-layer.
Media Access Control Sub-layer
The MAC Sub-layer is responsible for addressing on the Local Area Network.
The MAC Sub-layer is also responsible for determining when nodes on a Local Area Network are allowed to transmit. In Ethernet, this is accomplished using the CSMA/CD protocol.
Logical Link Sub-layer
The LLC Sub-layer is responsible for synchronizing frames, error checking, and flow control.
Data Link Layer Standards
Standards which operate at the Data Link Layer include: Ethernet, Wi-Fi, Frame Relay, ATM, and PPP.
What is the Physical Layer?
The Physical Layer is layer one of the OSI model.
The Physical Layer resides immediately below the Data Link Layer.
The Physical Layer is responsible for bit-level transmission between network nodes.
In copper networks, the Physical Layer is responsible for defining specifications for electrical signals. In fiber optic networks, the Physical Layer is responsible for defining the characteristics of light signals.
The Physical Layer defines items such as: connector types, cable types, voltages, and pin-outs.
Physical Layer Standards
Standards which operate at the Physical Layer include: RS-232, T1, and 10Base-T.
The Physical Layer resides immediately below the Data Link Layer.
The Physical Layer is responsible for bit-level transmission between network nodes.
In copper networks, the Physical Layer is responsible for defining specifications for electrical signals. In fiber optic networks, the Physical Layer is responsible for defining the characteristics of light signals.
The Physical Layer defines items such as: connector types, cable types, voltages, and pin-outs.
Physical Layer Standards
Standards which operate at the Physical Layer include: RS-232, T1, and 10Base-T.
What is the OSI Model?
The OSI model is a reference model which most IT professionals use to describe networks and network applications.
The OSI model was originally intended to describe a complete set of production network protocols, but the cost and complexity of the government processes involved in defining the OSI network made the project unviable. In the time that the OSI designers spent arguing over who would be responsible for what, TCP/IP conquered the world.
The Seven Layers of the OSI Model
The seven layers of the OSI model are:
Layer Name
7 Application
6 Presentation
5 Session
4 Transport
3 Network
2 Data Link
1 Physical
The easiest way to remember the layers of the OSI model is to use the handy mnemonic "All People Seem To Need Data Processing":
Layer Name Mnemonic
7 Application All
6 Presentation People
5 Session Seem
4 Transport To
3 Network Need
2 Data Link Data
1 Physical Processing
The functions of the seven layers of the OSI model are:
Layer Seven of the OSI Model
The Application Layer of the OSI model is responsible for providing end-user services, such as file transfers, electronic messaging, e-mail, virtual terminal access, and network management. This is the layer with which the user interacts.
Layer Six of the OSI Model
The Presentation Layer of the OSI model is responsible for defining the syntax which two network hosts use to communicate. Encryption and compression should be Presentation Layer functions.
Layer Five of the OSI Model
The Session Layer of the OSI model is responsible for establishing process-to-process commnunications between networked hosts.
Layer Four of the OSI Model
The Transport Layer of the OSI model is responsible for delivering messages between networked hosts. The Transport Layer should be responsible for fragmentation and reassembly.
Layer Three of the OSI Model
The Network Layer of the OSI model is responsible for establishing paths for data transfer through the network. Routers operate at the Network Layer.
Layer Two of the OSI Model
The Data Link Layer of the OSI model is responsible for communications between adjacent network nodes. Hubs and switches operate at the Data Link Layer.
Layer One of the OSI Model
The Physical Layer of the OSI model is responsible for bit-level transmission between network nodes. The Physical Layer defines items such as: connector types, cable types, voltages, and pin-outs.
The OSI Model vs. The Real World
The most major difficulty with the OSI model is that is does not map well to the real world!
The OSI was created after many of todays protocols were already in production use. These existing protocols, such as TCP/IP, were designed and built around the needs of real users with real problems to solve. The OSI model was created by academicians for academic purposes.
The OSI model is a very poor standard, but it's the only well-recognized standard we have which describes networked applications.
The easiest way to deal with the OSI model is to map the real-world protocols to the model, as well as they can be mapped.
Layer Name Common Protocols
7 Application SSH, telnet, FTP
6 Presentation HTTP, SMTP, SNMP
5 Session RPC, Named Pipes, NETBIOS
4 Transport TCP, UDP
3 Network IP
2 Data Link Ethernet
1 Physical Cat-5
The difficulty with this approach is that there is no general agreement as to which layer of the OSI model to map any specific protocol. You could argue forever about what OSI model layer SSH maps to.
A much more accurate model of real-world networking is the TCP/IP model:
TCP/IP Model
Application Layer
Transport Layer
Internet Layer
Network Interface Layer
The most significant downside with the TCP/IP model is that if you reference it, fewer people will know what you are talking about!
For a better description of why the OSI model should go the way of the dodo, disco, and DivX, read Kill the Beast: Why the Seven-Layer Model Must Die.
The OSI model was originally intended to describe a complete set of production network protocols, but the cost and complexity of the government processes involved in defining the OSI network made the project unviable. In the time that the OSI designers spent arguing over who would be responsible for what, TCP/IP conquered the world.
The Seven Layers of the OSI Model
The seven layers of the OSI model are:
Layer Name
7 Application
6 Presentation
5 Session
4 Transport
3 Network
2 Data Link
1 Physical
The easiest way to remember the layers of the OSI model is to use the handy mnemonic "All People Seem To Need Data Processing":
Layer Name Mnemonic
7 Application All
6 Presentation People
5 Session Seem
4 Transport To
3 Network Need
2 Data Link Data
1 Physical Processing
The functions of the seven layers of the OSI model are:
Layer Seven of the OSI Model
The Application Layer of the OSI model is responsible for providing end-user services, such as file transfers, electronic messaging, e-mail, virtual terminal access, and network management. This is the layer with which the user interacts.
Layer Six of the OSI Model
The Presentation Layer of the OSI model is responsible for defining the syntax which two network hosts use to communicate. Encryption and compression should be Presentation Layer functions.
Layer Five of the OSI Model
The Session Layer of the OSI model is responsible for establishing process-to-process commnunications between networked hosts.
Layer Four of the OSI Model
The Transport Layer of the OSI model is responsible for delivering messages between networked hosts. The Transport Layer should be responsible for fragmentation and reassembly.
Layer Three of the OSI Model
The Network Layer of the OSI model is responsible for establishing paths for data transfer through the network. Routers operate at the Network Layer.
Layer Two of the OSI Model
The Data Link Layer of the OSI model is responsible for communications between adjacent network nodes. Hubs and switches operate at the Data Link Layer.
Layer One of the OSI Model
The Physical Layer of the OSI model is responsible for bit-level transmission between network nodes. The Physical Layer defines items such as: connector types, cable types, voltages, and pin-outs.
The OSI Model vs. The Real World
The most major difficulty with the OSI model is that is does not map well to the real world!
The OSI was created after many of todays protocols were already in production use. These existing protocols, such as TCP/IP, were designed and built around the needs of real users with real problems to solve. The OSI model was created by academicians for academic purposes.
The OSI model is a very poor standard, but it's the only well-recognized standard we have which describes networked applications.
The easiest way to deal with the OSI model is to map the real-world protocols to the model, as well as they can be mapped.
Layer Name Common Protocols
7 Application SSH, telnet, FTP
6 Presentation HTTP, SMTP, SNMP
5 Session RPC, Named Pipes, NETBIOS
4 Transport TCP, UDP
3 Network IP
2 Data Link Ethernet
1 Physical Cat-5
The difficulty with this approach is that there is no general agreement as to which layer of the OSI model to map any specific protocol. You could argue forever about what OSI model layer SSH maps to.
A much more accurate model of real-world networking is the TCP/IP model:
TCP/IP Model
Application Layer
Transport Layer
Internet Layer
Network Interface Layer
The most significant downside with the TCP/IP model is that if you reference it, fewer people will know what you are talking about!
For a better description of why the OSI model should go the way of the dodo, disco, and DivX, read Kill the Beast: Why the Seven-Layer Model Must Die.
What Is an IP Address?
IP stands for Internet Protocol. An IP address is a unique address used by different computers on a computer network to identify and communicate with one another. So, an IP address is used as an identifier to find electronic devices connected to one another on a network. Therefore, each device in the network must have its own unique address. An IP address is like a mailing address that is used to deliver data, that is, files, to a computer.
Some IP addresses are meant to be unique within the scope of the global Internet, whereas others are meant to be unique within the scope of a specific network. Internet Assigned Numbers Authority (IANA) creates and manages IP addresses for the public Internet. IANA allocates the superblocks of addresses to Regional Internet Registries, which in turn allocate smaller blocks of addresses to Internet service providers.
Static and Dynamic IP Addresses
An IP address could be static or dynamic. If the computer uses the same IP address whenever it connects to the network, then it is said to have a static IP address; if the IP address changes frequently whenever the computer connects to the network, then it is said to have a dynamic IP address. Static IP addresses are manually assigned by the network administrator, whereas the Dynamic Host Configuration Protocol (DHCP) is used to assign dynamic IP addresses. An operating system can also assign itself a dynamic address when a DHCP server and the network administrator are not available. The operating system uses Zero-conf for this purpose. Dynamic addresses are usually used for LANs and broadband networks, whereas static addresses are used to locate servers within an enterprise.
At present, two versions of Internet Protocol are in use: IPv4 and IPv6. IPv4 uses 32-bit addresses, so its address space is limited to 4,294,967,296 unique addresses, with a large part reserved for special purposes. So, fewer addresses are available to be used for the public Internet. IPv6 was designed as a replacement for IPv4, as the addresses are 128 bits wide; so IPv6 offers a large address space.
IP stands for Internet Protocol. An IP address is a unique address used by different computers on a computer network to identify and communicate with one another. So, an IP address is used as an identifier to find electronic devices connected to one another on a network. Therefore, each device in the network must have its own unique address. An IP address is like a mailing address that is used to deliver data, that is, files, to a computer.
Some IP addresses are meant to be unique within the scope of the global Internet, whereas others are meant to be unique within the scope of a specific network. Internet Assigned Numbers Authority (IANA) creates and manages IP addresses for the public Internet. IANA allocates the superblocks of addresses to Regional Internet Registries, which in turn allocate smaller blocks of addresses to Internet service providers.
Static and Dynamic IP Addresses
An IP address could be static or dynamic. If the computer uses the same IP address whenever it connects to the network, then it is said to have a static IP address; if the IP address changes frequently whenever the computer connects to the network, then it is said to have a dynamic IP address. Static IP addresses are manually assigned by the network administrator, whereas the Dynamic Host Configuration Protocol (DHCP) is used to assign dynamic IP addresses. An operating system can also assign itself a dynamic address when a DHCP server and the network administrator are not available. The operating system uses Zero-conf for this purpose. Dynamic addresses are usually used for LANs and broadband networks, whereas static addresses are used to locate servers within an enterprise.
At present, two versions of Internet Protocol are in use: IPv4 and IPv6. IPv4 uses 32-bit addresses, so its address space is limited to 4,294,967,296 unique addresses, with a large part reserved for special purposes. So, fewer addresses are available to be used for the public Internet. IPv6 was designed as a replacement for IPv4, as the addresses are 128 bits wide; so IPv6 offers a large address space.
Computer POST / beep codes
Quick links
POST ABCs
The steps of a POST
POST troubleshooting
AMI BIOS beep codes
Award BIOS beep codes
IBM BIOS beep codes
Macintosh startup tones
Phoenix BIOS beep codes
Motherboard help
POST ABCs
The computer POST (Power On Self Test) tests the computer, insuring that it meets the necessary system requirements and that all hardware is working properly before starting the remainder of the boot process. If the computer passes the POST the computer will have a single beep (with some computer BIOS manufacturers it may beep twice) as the computer starts and the computer will continue to start normally. However, if the computer fails the POST, the computer will either not beep at all or will generate a beep code, which tells the user the source of the problem.
The steps of a POST
Each time the computer boots up the computer must past the POST. Below is the common steps a POST performs each time your computer starts.
1. Test the power supply to ensure that it is turned on and that it releases its reset signal.
2. CPU must exit the reset status mode and thereafter be able to execute instructions.
3. BIOS checksum must be valid, meaning that it must be readable.
4. CMOS checksum must be valid, meaning that it must be readable.
5. CPU must be able to read all forms of memory such as the memory controller, memory bus, and memory module.
6. The first 64KB of memory must be operational and have the capability to be read and written to and from, and capable of containing the POST code.
7. I/O bus / controller must be accessible.
8. I/O bus must be able to write / read from the video subsystem and be able to read all video RAM.
If the computer does not pass any of the above tests, your computer will receive an irregular POST. An irregular POST is a beep code that is different from the standard one or two beeps. This could be either no beeps at all or a combination of different beeps indicating what is causing the computer not to past the POST.
If you're receiving an irregular POST document CH000607 contains all the steps a user can do to resolve the issue or help determine what hardware has failed in the computer so it can be replaced. If you're getting a beep code the remainder of this page contains a listing of each of the major manufacturers beep codes and what they each mean.
Index
Category:
BIOS
Companies:
Click here
Related Pages:
AMI BIOS
Phoenix BIOS
Resolved
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AMI BIOS beep codes
Below are the AMI BIOS Beep codes that can occur. However, because of the wide variety of different computer manufacturers with this BIOS, the beep codes may vary.
Beep Code Descriptions Document
1 short DRAM refresh failure CH000996
2 short Parity circuit failure CH000607
3 short Base 64K RAM failure CH000996
4 short System timer failure CH000607
5 short Process failure CH000607
6 short Keyboard controller Gate A20 error CH000383
7 short Virtual mode exception error CH000607
8 short Display memory Read/Write test failure CH000607
9 short ROM BIOS checksum failure CH000607
10 short CMOS shutdown Read/Write error CH000239
11 short Cache Memory error CH000607
1 long, 3 short Conventional/Extended memory failure CH000996
1 long, 8 short Display/Retrace test failed CH000607
AWARD BIOS beep codes
Below are Award BIOS Beep codes that can occur. However, because of the wide variety of different computer manufacturers with this BIOS, the beep codes may vary.
Beep Code Description Document
1 long, 2 short Indicates a video error has occurred and the BIOS cannot initialize the video screen to display any additional information CH000607
Any other beep(s) RAM problem. CH000996
If any other correctable hardware issues, the BIOS will display a message.
IBM BIOS beep codes
Below are IBM BIOS Beep codes that can occur. However, because of the wide variety of models shipping with this BIOS, the beep codes may vary.
Beep Code Description Document
No Beeps No Power, Loose Card, or Short. CH000312
1 Short Beep Normal POST, computer is ok. No problem
2 Short Beep POST error, review screen for error code. See screen
Continuous Beep No Power, Loose Card, or Short. CH000607
Repeating Short Beep No Power, Loose Card, or Short. CH000607
One Long and one Short Beep Motherboard issue. CH000607
One Long and Two Short Beeps Video (Mono/CGA Display Circuitry) issue. CH000607
One Long and Three Short Beeps. Video (EGA) Display Circuitry. CH000607
Three Long Beeps Keyboard / Keyboard card error. CH000304
One Beep, Blank or Incorrect Display Video Display Circuitry. CH000607
Macintosh startup tones
Tones Error
Error Tone. (two sets of different tones) Problem with logic board or SCSI bus.
Startup tone, drive spins, no video Problem with video controller.
Powers on, no tone. Logic board problem.
High Tone, four higher tones. Problem with SIMM.
Phoenix BIOS beep codes
Below are the beep codes for PHOENIX BIOS Q3.07 OR 4.X
Beep Code Description / What to Check
1-1-1-3 Verify Real Mode.
1-1-2-1 Get CPU type.
1-1-2-3 Initialize system hardware.
1-1-3-1 Initialize chipset registers with initial POST values.
1-1-3-2 Set in POST flag.
1-1-3-3 Initialize CPU registers.
1-1-4-1 Initialize cache to initial POST values.
1-1-4-3 Initialize I/O.
1-2-1-1 Initialize Power Management.
1-2-1-2 Load alternate registers with initial POST values.
1-2-1-3 Jump to UserPatch0.
1-2-2-1 Initialize keyboard controller.
1-2-2-3 BIOS ROM checksum.
1-2-3-1 8254 timer initialization.
1-2-3-3 8237 DMA controller initialization.
1-2-4-1 Reset Programmable Interrupt Controller.
1-3-1-1 Test DRAM refresh.
1-3-1-3 Test 8742 Keyboard Controller.
1-3-2-1 Set ES segment to register to 4 GB.
1-3-3-1 28 Autosize DRAM.
1-3-3-3 Clear 512K base RAM.
1-3-4-1 Test 512 base address lines.
1-3-4-3 Test 512K base memory.
1-4-1-3 Test CPU bus-clock frequency.
1-4-2-4 Reinitialize the chipset.
1-4-3-1 Shadow system BIOS ROM.
1-4-3-2 Reinitialize the cache.
1-4-3-3 Autosize cache.
1-4-4-1 Configure advanced chipset registers.
1-4-4-2 Load alternate registers with CMOS values.
2-1-1-1 Set Initial CPU speed.
2-1-1-3 Initialize interrupt vectors.
2-1-2-1 Initialize BIOS interrupts.
2-1-2-3 Check ROM copyright notice.
2-1-2-4 Initialize manager for PCI Options ROMs.
2-1-3-1 Check video configuration against CMOS.
2-1-3-2 Initialize PCI bus and devices.
2-1-3-3 Initialize all video adapters in system.
2-1-4-1 Shadow video BIOS ROM.
2-1-4-3 Display copyright notice.
2-2-1-1 Display CPU type and speed.
2-2-1-3 Test keyboard.
2-2-2-1 Set key click if enabled.
2-2-2-3 56 Enable keyboard.
2-2-3-1 Test for unexpected interrupts.
2-2-3-3 Display prompt Press F2 to enter SETUP.
2-2-4-1 Test RAM between 512 and 640k.
2-3-1-1 Test expanded memory.
2-3-1-3 Test extended memory address lines.
2-3-2-1 Jump to UserPatch1.
2-3-2-3 Configure advanced cache registers.
2-3-3-1 Enable external and CPU caches.
2-3-3-3 Display external cache size.
2-3-4-1 Display shadow message.
2-3-4-3 Display non-disposable segments.
2-4-1-1 Display error messages.
2-4-1-3 Check for configuration errors.
2-4-2-1 Test real-time clock.
2-4-2-3 Check for keyboard errors
2-4-4-1 Set up hardware interrupts vectors.
2-4-4-3 Test coprocessor if present.
3-1-1-1 Disable onboard I/O ports.
3-1-1-3 Detect and install external RS232 ports.
3-1-2-1 Detect and install external parallel ports.
3-1-2-3 Re-initialize onboard I/O ports.
3-1-3-1 Initialize BIOS Data Area.
3-1-3-3 Initialize Extended BIOS Data Area.
3-1-4-1 Initialize floppy controller.
3-2-1-1 Initialize hard-disk controller.
3-2-1-2 Initialize local-bus hard-disk controller.
3-2-1-3 Jump to UserPatch2.
3-2-2-1 Disable A20 address line.
3-2-2-3 Clear huge ES segment register.
3-2-3-1 Search for option ROMs.
3-2-3-3 Shadow option ROMs.
3-2-4-1 Set up Power Management.
3-2-4-3 Enable hardware interrupts.
3-3-1-1 Set time of day.
3-3-1-3 Check key lock.
3-3-3-1 Erase F2 prompt.
3-3-3-3 Scan for F2 key stroke.
3-3-4-1 Enter SETUP.
3-3-4-3 Clear in-POST flag.
3-4-1-1 Check for errors
3-4-1-3 POST done--prepare to boot operating system.
3-4-2-1 One beep.
3-4-2-3 Check password (optional).
3-4-3-1 Clear global descriptor table.
3-4-4-1 Clear parity checkers.
3-4-4-3 Clear screen (optional).
3-4-4-4 Check virus and backup reminders.
4-1-1-1 Try to boot with INT 19.
4-2-1-1 Interrupt handler error.
4-2-1-3 Unknown interrupt error.
4-2-2-1 Pending interrupt error.
4-2-2-3 Initialize option ROM error.
4-2-3-1 Shutdown error.
4-2-3-3 Extended Block Move.
4-2-4-1 Shutdown 10 error.
4-3-1-3 Initialize the chipset.
4-3-1-4 Initialize refresh counter.
4-3-2-1 Check for Forced Flash.
4-3-2-2 Check HW status of ROM.
4-3-2-3 BIOS ROM is OK.
4-3-2-4 Do a complete RAM test.
4-3-3-1 Do OEM initialization.
4-3-3-2 Initialize interrupt controller.
4-3-3-3 Read in bootstrap code.
4-3-3-4 Initialize all vectors.
4-3-4-1 Boot the Flash program.
4-3-4-2 Initialize the boot device.
4-3-4-3 Boot code was read OK.
POST ABCs
The steps of a POST
POST troubleshooting
AMI BIOS beep codes
Award BIOS beep codes
IBM BIOS beep codes
Macintosh startup tones
Phoenix BIOS beep codes
Motherboard help
POST ABCs
The computer POST (Power On Self Test) tests the computer, insuring that it meets the necessary system requirements and that all hardware is working properly before starting the remainder of the boot process. If the computer passes the POST the computer will have a single beep (with some computer BIOS manufacturers it may beep twice) as the computer starts and the computer will continue to start normally. However, if the computer fails the POST, the computer will either not beep at all or will generate a beep code, which tells the user the source of the problem.
The steps of a POST
Each time the computer boots up the computer must past the POST. Below is the common steps a POST performs each time your computer starts.
1. Test the power supply to ensure that it is turned on and that it releases its reset signal.
2. CPU must exit the reset status mode and thereafter be able to execute instructions.
3. BIOS checksum must be valid, meaning that it must be readable.
4. CMOS checksum must be valid, meaning that it must be readable.
5. CPU must be able to read all forms of memory such as the memory controller, memory bus, and memory module.
6. The first 64KB of memory must be operational and have the capability to be read and written to and from, and capable of containing the POST code.
7. I/O bus / controller must be accessible.
8. I/O bus must be able to write / read from the video subsystem and be able to read all video RAM.
If the computer does not pass any of the above tests, your computer will receive an irregular POST. An irregular POST is a beep code that is different from the standard one or two beeps. This could be either no beeps at all or a combination of different beeps indicating what is causing the computer not to past the POST.
If you're receiving an irregular POST document CH000607 contains all the steps a user can do to resolve the issue or help determine what hardware has failed in the computer so it can be replaced. If you're getting a beep code the remainder of this page contains a listing of each of the major manufacturers beep codes and what they each mean.
Index
Category:
BIOS
Companies:
Click here
Related Pages:
AMI BIOS
Phoenix BIOS
Resolved
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AMI BIOS beep codes
Below are the AMI BIOS Beep codes that can occur. However, because of the wide variety of different computer manufacturers with this BIOS, the beep codes may vary.
Beep Code Descriptions Document
1 short DRAM refresh failure CH000996
2 short Parity circuit failure CH000607
3 short Base 64K RAM failure CH000996
4 short System timer failure CH000607
5 short Process failure CH000607
6 short Keyboard controller Gate A20 error CH000383
7 short Virtual mode exception error CH000607
8 short Display memory Read/Write test failure CH000607
9 short ROM BIOS checksum failure CH000607
10 short CMOS shutdown Read/Write error CH000239
11 short Cache Memory error CH000607
1 long, 3 short Conventional/Extended memory failure CH000996
1 long, 8 short Display/Retrace test failed CH000607
AWARD BIOS beep codes
Below are Award BIOS Beep codes that can occur. However, because of the wide variety of different computer manufacturers with this BIOS, the beep codes may vary.
Beep Code Description Document
1 long, 2 short Indicates a video error has occurred and the BIOS cannot initialize the video screen to display any additional information CH000607
Any other beep(s) RAM problem. CH000996
If any other correctable hardware issues, the BIOS will display a message.
IBM BIOS beep codes
Below are IBM BIOS Beep codes that can occur. However, because of the wide variety of models shipping with this BIOS, the beep codes may vary.
Beep Code Description Document
No Beeps No Power, Loose Card, or Short. CH000312
1 Short Beep Normal POST, computer is ok. No problem
2 Short Beep POST error, review screen for error code. See screen
Continuous Beep No Power, Loose Card, or Short. CH000607
Repeating Short Beep No Power, Loose Card, or Short. CH000607
One Long and one Short Beep Motherboard issue. CH000607
One Long and Two Short Beeps Video (Mono/CGA Display Circuitry) issue. CH000607
One Long and Three Short Beeps. Video (EGA) Display Circuitry. CH000607
Three Long Beeps Keyboard / Keyboard card error. CH000304
One Beep, Blank or Incorrect Display Video Display Circuitry. CH000607
Macintosh startup tones
Tones Error
Error Tone. (two sets of different tones) Problem with logic board or SCSI bus.
Startup tone, drive spins, no video Problem with video controller.
Powers on, no tone. Logic board problem.
High Tone, four higher tones. Problem with SIMM.
Phoenix BIOS beep codes
Below are the beep codes for PHOENIX BIOS Q3.07 OR 4.X
Beep Code Description / What to Check
1-1-1-3 Verify Real Mode.
1-1-2-1 Get CPU type.
1-1-2-3 Initialize system hardware.
1-1-3-1 Initialize chipset registers with initial POST values.
1-1-3-2 Set in POST flag.
1-1-3-3 Initialize CPU registers.
1-1-4-1 Initialize cache to initial POST values.
1-1-4-3 Initialize I/O.
1-2-1-1 Initialize Power Management.
1-2-1-2 Load alternate registers with initial POST values.
1-2-1-3 Jump to UserPatch0.
1-2-2-1 Initialize keyboard controller.
1-2-2-3 BIOS ROM checksum.
1-2-3-1 8254 timer initialization.
1-2-3-3 8237 DMA controller initialization.
1-2-4-1 Reset Programmable Interrupt Controller.
1-3-1-1 Test DRAM refresh.
1-3-1-3 Test 8742 Keyboard Controller.
1-3-2-1 Set ES segment to register to 4 GB.
1-3-3-1 28 Autosize DRAM.
1-3-3-3 Clear 512K base RAM.
1-3-4-1 Test 512 base address lines.
1-3-4-3 Test 512K base memory.
1-4-1-3 Test CPU bus-clock frequency.
1-4-2-4 Reinitialize the chipset.
1-4-3-1 Shadow system BIOS ROM.
1-4-3-2 Reinitialize the cache.
1-4-3-3 Autosize cache.
1-4-4-1 Configure advanced chipset registers.
1-4-4-2 Load alternate registers with CMOS values.
2-1-1-1 Set Initial CPU speed.
2-1-1-3 Initialize interrupt vectors.
2-1-2-1 Initialize BIOS interrupts.
2-1-2-3 Check ROM copyright notice.
2-1-2-4 Initialize manager for PCI Options ROMs.
2-1-3-1 Check video configuration against CMOS.
2-1-3-2 Initialize PCI bus and devices.
2-1-3-3 Initialize all video adapters in system.
2-1-4-1 Shadow video BIOS ROM.
2-1-4-3 Display copyright notice.
2-2-1-1 Display CPU type and speed.
2-2-1-3 Test keyboard.
2-2-2-1 Set key click if enabled.
2-2-2-3 56 Enable keyboard.
2-2-3-1 Test for unexpected interrupts.
2-2-3-3 Display prompt Press F2 to enter SETUP.
2-2-4-1 Test RAM between 512 and 640k.
2-3-1-1 Test expanded memory.
2-3-1-3 Test extended memory address lines.
2-3-2-1 Jump to UserPatch1.
2-3-2-3 Configure advanced cache registers.
2-3-3-1 Enable external and CPU caches.
2-3-3-3 Display external cache size.
2-3-4-1 Display shadow message.
2-3-4-3 Display non-disposable segments.
2-4-1-1 Display error messages.
2-4-1-3 Check for configuration errors.
2-4-2-1 Test real-time clock.
2-4-2-3 Check for keyboard errors
2-4-4-1 Set up hardware interrupts vectors.
2-4-4-3 Test coprocessor if present.
3-1-1-1 Disable onboard I/O ports.
3-1-1-3 Detect and install external RS232 ports.
3-1-2-1 Detect and install external parallel ports.
3-1-2-3 Re-initialize onboard I/O ports.
3-1-3-1 Initialize BIOS Data Area.
3-1-3-3 Initialize Extended BIOS Data Area.
3-1-4-1 Initialize floppy controller.
3-2-1-1 Initialize hard-disk controller.
3-2-1-2 Initialize local-bus hard-disk controller.
3-2-1-3 Jump to UserPatch2.
3-2-2-1 Disable A20 address line.
3-2-2-3 Clear huge ES segment register.
3-2-3-1 Search for option ROMs.
3-2-3-3 Shadow option ROMs.
3-2-4-1 Set up Power Management.
3-2-4-3 Enable hardware interrupts.
3-3-1-1 Set time of day.
3-3-1-3 Check key lock.
3-3-3-1 Erase F2 prompt.
3-3-3-3 Scan for F2 key stroke.
3-3-4-1 Enter SETUP.
3-3-4-3 Clear in-POST flag.
3-4-1-1 Check for errors
3-4-1-3 POST done--prepare to boot operating system.
3-4-2-1 One beep.
3-4-2-3 Check password (optional).
3-4-3-1 Clear global descriptor table.
3-4-4-1 Clear parity checkers.
3-4-4-3 Clear screen (optional).
3-4-4-4 Check virus and backup reminders.
4-1-1-1 Try to boot with INT 19.
4-2-1-1 Interrupt handler error.
4-2-1-3 Unknown interrupt error.
4-2-2-1 Pending interrupt error.
4-2-2-3 Initialize option ROM error.
4-2-3-1 Shutdown error.
4-2-3-3 Extended Block Move.
4-2-4-1 Shutdown 10 error.
4-3-1-3 Initialize the chipset.
4-3-1-4 Initialize refresh counter.
4-3-2-1 Check for Forced Flash.
4-3-2-2 Check HW status of ROM.
4-3-2-3 BIOS ROM is OK.
4-3-2-4 Do a complete RAM test.
4-3-3-1 Do OEM initialization.
4-3-3-2 Initialize interrupt controller.
4-3-3-3 Read in bootstrap code.
4-3-3-4 Initialize all vectors.
4-3-4-1 Boot the Flash program.
4-3-4-2 Initialize the boot device.
4-3-4-3 Boot code was read OK.
Wednesday, November 4, 2009
Question: Can You Hide Your Public IP Address?
When connecting to the Internet, your home computer (or network router) is assigned a public IP address. As you visit Web sites or other Internet servers, that public IP address is transmitted and recorded in log files kept on those servers. Access logs leave behind a trail of your Internet activity. If it were possible to somehow hide your public IP address, your Internet activity would become much more difficult to trace.
Answer: Unfortunately, it is not technically possible to always hide the public IP address of a home network. An IP address enables devices to locate and communicate with each other on the Internet. Completely hiding the IP address of a device would render it invisible but also unusable online.
On the other hand, it is possible to hide public IP addreseses from most Internet servers in most situations. This method involves an Internet service called an anonymous proxy server.
Anonymous Proxy Servers
An anonymous proxy server ("proxy") is a special type of server that acts as an intermediary between a home network and the rest of the Internet. An anonymous proxy server makes requests for Internet information on your behalf, using its own IP address instead of yours. Your computer only accesses Web sites indirectly, through the proxy server. This way, Web sites will see the proxy's IP address, not your home IP address.
Using an anonymous proxy server requires a simple configuration of the Web browser (or other Internet client software that supports proxies). Proxies are identified by a combination of URL and TCP port number.
Numerous free anonymous proxy servers exist on the Internet, open for anyone to use. These servers may have bandwidth traffic limits, may suffer from reliability or speed problems, or might permanently disappear from the Internet without notice. Such servers are most useful for temporary or experimental purposes.
Anonymous proxy services that charge fees in return for better quality of service also exist. These services are designed for regular use by households.
Hiding Your IP Address - Related Tools
Several related software tools (both free and paid versions) support anonymizing proxies. The Firefox extension called "switchproxy," for example, supports defining a pool of proxy servers in the Web browser and automatically switching between them at regular time intervals. In general, these tools help you both find proxies and also simplify the process of configuring and using them.
The ability to hide an IP address increases your privacy on the Internet. Other approaches to improving Internet privacy also exist and complement each other. Managing Web browser cookies, using encryption when sending personal information, running a firewall and other techniques all contribute toward a greater feeling of safety and security when going online.
Answer: Unfortunately, it is not technically possible to always hide the public IP address of a home network. An IP address enables devices to locate and communicate with each other on the Internet. Completely hiding the IP address of a device would render it invisible but also unusable online.
On the other hand, it is possible to hide public IP addreseses from most Internet servers in most situations. This method involves an Internet service called an anonymous proxy server.
Anonymous Proxy Servers
An anonymous proxy server ("proxy") is a special type of server that acts as an intermediary between a home network and the rest of the Internet. An anonymous proxy server makes requests for Internet information on your behalf, using its own IP address instead of yours. Your computer only accesses Web sites indirectly, through the proxy server. This way, Web sites will see the proxy's IP address, not your home IP address.
Using an anonymous proxy server requires a simple configuration of the Web browser (or other Internet client software that supports proxies). Proxies are identified by a combination of URL and TCP port number.
Numerous free anonymous proxy servers exist on the Internet, open for anyone to use. These servers may have bandwidth traffic limits, may suffer from reliability or speed problems, or might permanently disappear from the Internet without notice. Such servers are most useful for temporary or experimental purposes.
Anonymous proxy services that charge fees in return for better quality of service also exist. These services are designed for regular use by households.
Hiding Your IP Address - Related Tools
Several related software tools (both free and paid versions) support anonymizing proxies. The Firefox extension called "switchproxy," for example, supports defining a pool of proxy servers in the Web browser and automatically switching between them at regular time intervals. In general, these tools help you both find proxies and also simplify the process of configuring and using them.
The ability to hide an IP address increases your privacy on the Internet. Other approaches to improving Internet privacy also exist and complement each other. Managing Web browser cookies, using encryption when sending personal information, running a firewall and other techniques all contribute toward a greater feeling of safety and security when going online.
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